• DocumentCode
    2067319
  • Title

    In this work, we propose two translations: one from extended

  • Author

    Altisen, Karine ; Cassez, Franck ; Tripakis, Stavros

  • Author_Institution
    Verimag Laboratory
  • fYear
    2006
  • fDate
    28-30 June 2006
  • Firstpage
    101
  • Lastpage
    110
  • Abstract
    We study the monitoring and fault-diagnosis problems for dense-time real-time systems, where observers (monitors and diagnosers) have access to digital rather than analog clocks. Analog clocks are infinitely-precise, thus, not implementable. We show how, given a specification modeled as a timed automaton and a timed automaton model of the digital clock, a sound and optimal (i.e., as precise as possible) digital-clock monitor can be synthesized. We also show how, given plant and digital clock modeled as timed automata, we can check existence of a digital-clock diagnoser and, if one exists, how to synthesize it. Finally, we consider the problem of existence of digital-clock diagnosers where the digital clock is unknown. We show that there are cases where a digital clock, no matter how precise, does not exist, even though the system is diagnosable with analog clocks. Finally, we provide a sufficient condition for digital-clock diagnosability.
  • Keywords
    Automata; Clocks; Computerized monitoring; Equations; Fault detection; Fault diagnosis; Laboratories; Real time systems; Sufficient conditions; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Application of Concurrency to System Design, 2006. ACSD 2006. Sixth International Conference on
  • ISSN
    1550-4808
  • Print_ISBN
    0-7695-2556-3
  • Type

    conf

  • DOI
    10.1109/ACSD.2006.10
  • Filename
    1640228