• DocumentCode
    2067325
  • Title

    High-Speed Factorization Architecture for Soft-Decision Reed-Solomon Decoding

  • Author

    Zhang, Xinmiao

  • Author_Institution
    Case Western Reserve Univ., Cleveland
  • fYear
    2007
  • fDate
    1-4 Oct. 2007
  • Firstpage
    370
  • Lastpage
    375
  • Abstract
    Reed-Solomon (RS) codes are among the most widely utilized error-correcting codes in modern communication and computer systems. Among the decoding algorithms of RS codes, the recently proposed Koetter-Vardy (KV) soft-decision decoding can achieve substantial coding gain, while has a polynomial complexity. One of the major steps of the KV decoding is the factorization. The root computation involved in each iteration level of the factorization is traditionally implemented by exhaustive search. A fast factorization architecture has been proposed to circumvent the exhaustive root search from the second iteration level by using a root-order prediction scheme. However, the root computation in the first iteration level is still carried out by exhaustive search, which accounts for a significant part of the overall factorization latency. In this paper, a novel iterative prediction scheme is proposed to compute the roots in the first iteration level. The proposed scheme can substantially reduce the average latency of the factorization, while only incurs negligible area overhead. Applying this scheme to a (255, 239) RS code, a speedup of 36% can be achieved.
  • Keywords
    Reed-Solomon codes; algebraic codes; computational complexity; digital arithmetic; error correction codes; iterative decoding; matrix decomposition; parallel architectures; pipeline processing; Koetter-Vardy soft-decision decoding; Reed-Solomon code; algebraic coding; error-correcting code; exhaustive root search; high-speed factorization architecture; iterative root-order prediction scheme; pipeline processing; polynomial complexity; soft-decision Reed-Solomon decoding algorithm; Computer architecture; Delay; Error correction codes; Hardware; Interpolation; Iterative decoding; Optical recording; Polynomials; Reed-Solomon codes; Spread spectrum communication;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design, 2006. ICCD 2006. International Conference on
  • Conference_Location
    San Jose, CA
  • ISSN
    1063-6404
  • Print_ISBN
    978-0-7803-9707-1
  • Electronic_ISBN
    1063-6404
  • Type

    conf

  • DOI
    10.1109/ICCD.2006.4380843
  • Filename
    4380843