DocumentCode :
2067616
Title :
Update-based cache coherence protocols for scalable shared-memory multiprocessors
Author :
Glasco, David B. ; Delagi, Bruce A. ; Flynn, Michael J.
Author_Institution :
Comput. Syst. Lab., Stanford Univ., CA, USA
Volume :
1
fYear :
1994
fDate :
4-7 Jan. 1994
Firstpage :
534
Lastpage :
545
Abstract :
Presents two hardware-controlled update-based cache coherence protocols. The authors discuss the two major disadvantages of the update protocols: inefficiency of updates and the mismatch between the granularity of synchronization and the data transfer. They present two enhancements to the update-based protocols, a write combining scheme and a finer grain synchronization, to overcome these disadvantages. The results demonstrate the effectiveness of these enhancements that, when used together, allow the update-based protocols to significantly improve the execution time of a set of scientific applications when compared to three invalidate-based protocols.<>
Keywords :
buffer storage; memory architecture; performance evaluation; protocols; shared memory systems; storage management; synchronisation; cache coherence protocols; enhancements; execution time; finer grain synchronization; mismatch; scalable shared-memory multiprocessors; update-based; updates; write combining scheme;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
System Sciences, 1994. Proceedings of the Twenty-Seventh Hawaii International Conference on
Conference_Location :
Wailea, HI, USA
Print_ISBN :
0-8186-5090-7
Type :
conf
DOI :
10.1109/HICSS.1994.323135
Filename :
323135
Link To Document :
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