Title :
Microarchitecture and Performance Analysis of Godson-2 SMT Processor
Author :
Li, Zusong ; Xu, Xianchao ; Hu, Weiwu ; Tang, Zhimin
Author_Institution :
Chinese Acad. of Sci., Beijing
Abstract :
This paper introduces the microarchitecture and logical implementation of SMT (Simultaneous Multithreading) improvement of Godson-2 processor which is a 64-bit, four-issue, out-of-order execution high performance processor. The condition for implementing correct memory consistency model in Godson-2 SMT processor is studied and a new register-level sharing and synchronization scheme is proposed. Godson-2 SMT processor has been implemented at the RTL level and simulated with the VstationPro of Mentor Graphics. The Linux operating system is ported to run in Godson-2 SMT processor and application programs such as SPEC CPU2000 benchmark suite are used to evaluate performance. Experimental results indicate that the performance of Godson-2 SMT processor is improved significantly by fully exploiting thread-level parallelism and optimized utilization of functional units. The average speedup is 31.3% with 18.8% area overhead.
Keywords :
Linux; computer architecture; microprocessor chips; multi-threading; performance evaluation; synchronisation; Godson-2 SMT processor; Linux operating system; RTL level; SPEC CPU2000 benchmark suite; mentor graphics; register-level sharing; synchronization scheme; thread-level parallelism; Costs; Hardware; Microarchitecture; Multithreading; Out of order; Performance analysis; Pipelines; Registers; Surface-mount technology; Yarn; Godson-2; Memory consistency model; Microarchitecture; Register sharing; Simultaneous multithreading;
Conference_Titel :
Computer Design, 2006. ICCD 2006. International Conference on
Conference_Location :
San Jose, CA
Print_ISBN :
978-0-7803-9707-1
Electronic_ISBN :
1063-6404
DOI :
10.1109/ICCD.2006.4380860
