Memory organization tradeoffs in computer systems design

Advances in technology and computer design are resulting in impressive increases in raw processor power. Currently, new processor implementations are showing almost a doubling in clock frequency. Moreover, with each new generation, processor designers are incorporating more advance architecture techniques such as instruction level parallelism into these implementations. Memory technology also continues to improve, but as always, memory performance still trail processor requirements. As raw processor performance increases, the memory access latency, be it to main memory or to disk memory, becomes more significant to overall system performance. When the data access rate of a memory subsystem does not meet the data request rate of the processor, system performance is less than desired. With today´s high speed processors, meeting this request rate is more and more difficult to achieve. The rapid development of integration technology has resulted in a significant trend in computer system design; almost all computer systems being designed are based on single chip processor implementations i.e. the microprocessor. This recent shift in the design of computer systems is expected to continue and future computer systems will not be classified by processor architecture but by the structure and cost of the interconnect, IO and memory subsystems.<>