Design and implementation of RSA for dual interface bank IC card

Bank IC card is widely used in financial industry and its demands on low power and security are urgent. RSA used for digital signature is the most energy-consuming part in bank IC card and threatened by side-channel attacks. In this paper, a low-power 1024/2048-bit RSA module is proposed and it´s verified with C*Core C0 in FPGA board. Design Compiler synthesis result indicates that RSA occupies 30k gates and the throughput is 9.23 Kbps under the frequency of 30MHz with SMIC 0.18um process. The highest frequency of RSA can reach 161MHz. Primetime estimation report shows that power consumption of simulation is 7.09 mw. This design adopts Montgomery algorithm, improves FIPS algorithm with combination of modular multiplication and modular square. The efficiency of modular square is improved by 23.78%. Adder and multiplier are reused in both pre-process and FIPS parts. This leads to calculation acceleration and smaller area. Clock-gating and operand isolation are applied to reduce the unnecessary flip-flops of registers and lower the power dissipation. In addition, Montgomery powering ladder is used to resist side-channel attacks from algorithm level. Therefore this design is feasible for bank IC card.