• DocumentCode
    2068227
  • Title

    Secure systolic architecture for montgomery modular multiplication algorithm

  • Author

    Qi Yang ; Xiaoting Hu ; Zhongping Qin

  • Author_Institution
    Sch. of Comput., Wuhan Univ., Wuhan, China
  • fYear
    2013
  • fDate
    28-31 Oct. 2013
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    A novel secure architecture of secure systolic Montgomery modular multiplier resilient to Fault-Injection attacks is proposed. The proposed architecture has been verified by modeling, implementing and testing it using VHDL. The error mask probability is under 0.0015% when we set the check integer properly. The performances of proposed architecture are comparable to those of other schemes in literature, where the hardware overheads vary from 5.68% to 46.44% in different types of implementations, and the time overheads are close to 0.
  • Keywords
    hardware description languages; integrated circuit modelling; integrated circuit testing; multiplying circuits; probability; Montgomery modular multiplication algorithm; VHDL; check integer; error mask probability; fault injection attacks; hardware overhead; secure systolic architecture; Decision support systems;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ASIC (ASICON), 2013 IEEE 10th International Conference on
  • Conference_Location
    Shenzhen
  • ISSN
    2162-7541
  • Print_ISBN
    978-1-4673-6415-7
  • Type

    conf

  • DOI
    10.1109/ASICON.2013.6812007
  • Filename
    6812007