DocumentCode
2068446
Title
Efficient simulation methods for multi-level cache memory hierarchies
Author
Chang, Si-En ; Hsu, Chia-Chang
Author_Institution
Dept. of Inf. & Comput. Eng., Chung Yuan Christian Univ., Chung Li, Taiwan
Volume
1
fYear
1994
fDate
4-7 Jan. 1994
Firstpage
221
Lastpage
230
Abstract
The complexity of multi-level cache hierarchies simulation is much more complicated than that of single-level cache simulation, so that it is highly desirable to develop some efficient simulation methods for multi-level cache hierarchies performance analysis. A one pass multi-level unified cache hierarchies simulation method is developed based on stack model and inclusion properties. Recently, many processors utilized split instruction and data caches in the first cache level. A one pass multi-level hybrid cache simulation method is proposed for more generalized hierarchies. These two one pass simulation methods have been implemented. The simulation results show the effectiveness of these two one pass simulation methods.<>
Keywords
buffer storage; digital simulation; performance evaluation; cache hierarchies performance analysis; complexity; inclusion properties; multi-level cache memory hierarchies; simulation methods; stack model; unified cache hierarchies simulation method;
fLanguage
English
Publisher
ieee
Conference_Titel
System Sciences, 1994. Proceedings of the Twenty-Seventh Hawaii International Conference on
Conference_Location
Wailea, HI, USA
Print_ISBN
0-8186-5090-7
Type
conf
DOI
10.1109/HICSS.1994.323169
Filename
323169
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