• DocumentCode
    2068604
  • Title

    AHardware implementation of DES with combined countermeasure against DPA

  • Author

    Xiaoxin Cui ; Rui Li ; Wei Wei ; Juan Gu ; Xiaole Cui

  • Author_Institution
    Key Lab. of Microelectron. Devices & Circuits, Peking Univ., Beijing, China
  • fYear
    2013
  • fDate
    28-31 Oct. 2013
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    Differential Power Analysis (DPA) reveals the secret key from the cryptographic device by side channel power leakage. Masking and Random Delay Insertion (RDI) are two countermeasures against DPA attack. But masking or RDI alone does not prevent DPA attack, they only enhance the difficulty of the attack. This paper proposes a novel countermeasure which associating masking with RDI. Furthermore, multi-masking instead of transformed masking is proposed in order to defend DPA attack based on hamming distance model. The combined countermeasure is implemented and verified on Data Encryption Standard (DES) algorithm. The results show that the combined countermeasure defends DPA attack with 105 power traces, and increases 40% ability against DPA with only 28% performance penalty.
  • Keywords
    cryptography; field programmable gate arrays; power aware computing; DES algorithm; DPA attack; FPGA; RDI; cryptographic device; data encryption standard; differential power analysis; hardware implementation; random delay insertion; side channel power leakage; Delays; Field programmable gate arrays; Hamming distance; Hardware; Power demand; Registers; Security;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ASIC (ASICON), 2013 IEEE 10th International Conference on
  • Conference_Location
    Shenzhen
  • ISSN
    2162-7541
  • Print_ISBN
    978-1-4673-6415-7
  • Type

    conf

  • DOI
    10.1109/ASICON.2013.6812024
  • Filename
    6812024