Design of a novel all-CMOS low power voltage reference circuit

Author

Yusen Xu ; Wei Hu ; Fengying Huang ; Jiwei Huang

Author_Institution

Dept. of Phys. & Inf. Eng., Fuzhou Univ., Fuzhou, China

fYear

2013

fDate

28-31 Oct. 2013

Firstpage

1

Lastpage

4

Abstract

A new low-power voltage reference circuit was proposed using the SMIC 0.18um standard CMOS process technology. The resulting voltage is equal to the extrapolated threshold voltage of a MOSFET at 0K, which was about 620mV for this process. Cadence Spectre simulation results show that the temperature coefficient of the output voltage was 12.9ppm/° in a range from -20 to 80°. The line sensitivity was 328ppm/V in a supply voltage range of 1.2-3V. Meanwhile - 68 dB @ 100Hz of the power supply rejection ratio (PSRR) is reached and it merely consumes 0.21 μ W of power. The proposed circuit is full composed of CMOS devices without any use of resistors, which enjoys the merits of low power consumption and small chip area.

Keywords

CMOS integrated circuits; integrated circuit design; low-power electronics; reference circuits; Cadence Spectre simulation; MOSFET; PSRR; SMIC standard CMOS process technology; all-CMOS low power voltage reference circuit design; low power consumption; power 0.21 muW; power supply rejection ratio; size 0.18 mum; temperature coefficient; voltage 0 V; voltage 1.2 V to 3 V; CMOS integrated circuits; MOSFET; Noise; Resistors; Temperature; Temperature sensors; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC (ASICON), 2013 IEEE 10th International Conference on

Conference_Location

Shenzhen

ISSN

2162-7541

Print_ISBN

978-1-4673-6415-7

Type

conf

DOI

10.1109/ASICON.2013.6812028

Filename

6812028