Using regular array methods for DSP module synthesis

Methods of regular arrays can be used to specify, synthesize, transform, and verify arithmetic and coding modules for use in higher-level DSP systems. Although some designs and methodology have been proposed for bit level arrays, the author shows how regular array methods can be integrated into various stages of the synthesis process for DSP/arithmetic structures. As technologies rapidly advance, the re-design and maintenance of module libraries is becoming a tedious task. Regular array descriptions of arithmetic algorithms provide a method for parameterized module generation which is an alternative to custom design and to current methods of sequential logic synthesis. The author presents a methodology which allows a designer to systematically consider a much broader space of arithmetic alternatives than is typically found in module libraries. Starting with the number representation, he discusses methods and tools for synthesizing and analyzing arithmetic algorithms, architectures and implementations. He considers measures of cost, precision and performance at different levels of abstraction as well as inter- and intra-level verification. He then describes the ARREST design system, a CAD environment for specification, synthesis and analysis of fine-grained computational arrays. Three example designs are discussed: 1) sub-band coding via Discrete Wavelet Transform, 2) Reed-Solomon ECC decoding, and 3) scheduling a real-time multiprocessor system.<>