DocumentCode
2068861
Title
Self-Freeze Linear Decompressors for Low Power Testing
Author
Tenentes, V. ; Kavousianos, X.
Author_Institution
Dept. of Comput. Sci., Univ. of Ioannina, Ioannina, Greece
fYear
2010
fDate
5-7 July 2010
Firstpage
63
Lastpage
68
Abstract
Even though linear decompressors constitute a very effective solution for compressing test data, they cause increased shift power dissipation during scan testing. Recently, a new linear decompression architecture was proposed which offers reduced shift power at the expense however of increased test data volume and test sequence length. In this paper we present a new linear encoding method which offers both high compression and low shift power dissipation at the same time. A new low-cost, test-set-independent scheme is also proposed which can be combined with any linear decompressor for reducing the shift power during testing. Extensive experiments show that the proposed method offers reduced test power dissipation, test sequence length and test data volume at the same time, with very small area requirements.
Keywords
data compression; encoding; linear codes; linear encoding; low power testing; scan testing; self-freeze linear decompressors; shift power dissipation; test data compression; test data volume; test sequence length; test-set-independent scheme; Computer architecture; Encoding; Power dissipation; Registers; Ring generators; Switches; average power reduction; lfsr encoding; scan testing;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI (ISVLSI), 2010 IEEE Computer Society Annual Symposium on
Conference_Location
Lixouri, Kefalonia
Print_ISBN
978-1-4244-7321-2
Type
conf
DOI
10.1109/ISVLSI.2010.37
Filename
5571809
Link To Document