Title :
Parallel implementation of BDD algorithms using a distributed shared memory
Author :
Parasuram, Yegnashankar ; Stabler, Edward ; Chin, Shiv-Kai
Author_Institution :
Dept. of Electr. & Comput. Eng., Syracuse Univ., NY, USA
Abstract :
Binary Decision Diagrams (BDDs) are used extensively in VLSI CAD for verification, synthesis, logic minimization and testing. Parallel algorithms for Boolean Function Manipulation using BDDs have been proposed and implemented on a Connection Machine (CM-5). Abstractions have been developed to support the design of these algorithms using the message passing model of parallel programming. A Distributed Shared Memory (DSM) has been built for sharing date. Fine grained load balancing is achieved using a Distributed Stack. Experimental results are shown for the DSM and the BDD algorithms. These results demonstrate the feasibility of using parallel computing for irregular and memory intensive CAD applications such as the BDD algorithms. Improvements to the current implementation are identified for future work.<>
Keywords :
VLSI; distributed memory systems; logic CAD; logic design; message passing; parallel algorithms; shared memory systems; BDD algorithms; Binary Decision Diagrams; Boolean Function Manipulation; CM-5; Connection Machine; VLSI CAD; distributed shared memory; distributed stack; load balancing; logic minimization; logic testing; parallel algorithms; synthesis; verification;
Conference_Titel :
System Sciences, 1994. Proceedings of the Twenty-Seventh Hawaii International Conference on
Conference_Location :
Wailea, HI, USA
Print_ISBN :
0-8186-5090-7
DOI :
10.1109/HICSS.1994.323189