End to end jitter control on AFDX network

Avionics full duplex switched Ethernet network (AFDX), based on IEEE802.3, has been developed as a cost-effective avionic network to replace the low-speed ARINC 429 which has limited bandwidth and limited addressing capability. For avionic real-time electronic system, delay and delay jitter are the most important parameters that must be guaranteed for some data such as the data for piloting plane. But the competition of the resource of the scheduler between multiple Virtual Links will result in delay and jitter in the AFDX network and the jitter would become unacceptable when the data flow passes through multiple-hops. In this paper, we introduce a jitter-EDD mechanism into the AFDX network. It can regulate the data flows on the AFDX network components and significantly reduce the end-to-end jitter. In order to assure that every frame can be sent to the physical link before its deadline, we also do schedulability analysis for the schedulers.