Board level drop test modeling for system-in-packages

Recently, drop test reliability has become a major concern for mobile electronic products. Especially, system-in-package (SIP) like stacked-die-package and package-on-package may lead to increased stress in solder joints during drop impacts due to their complicate structures. In this study, the evaluation of drop test reliability was performed for SIPs using modeling and drop test. 3D-dynamic nonlinear finite element analyses were performed for drop test modeling. After the correlation was observed between modeling and drop test, the optimization of material properties was studied for these packages.