DocumentCode :
2069189
Title :
Board level drop test modeling for system-in-packages
Author :
Amagai, Masazumi ; Yamada, Eiichi
Author_Institution :
Tsukuba Technol. Center, Texas Instrum., Tsukuba
fYear :
2009
fDate :
26-29 May 2009
Firstpage :
700
Lastpage :
703
Abstract :
Recently, drop test reliability has become a major concern for mobile electronic products. Especially, system-in-package (SIP) like stacked-die-package and package-on-package may lead to increased stress in solder joints during drop impacts due to their complicate structures. In this study, the evaluation of drop test reliability was performed for SIPs using modeling and drop test. 3D-dynamic nonlinear finite element analyses were performed for drop test modeling. After the correlation was observed between modeling and drop test, the optimization of material properties was studied for these packages.
Keywords :
electronic products; finite element analysis; impact testing; integrated circuit reliability; system-in-package; 3D-dynamic nonlinear finite element analyses; drop test modeling; drop test reliability; material property; mobile electronic product; package-on-package; stacked-die-package; system-in-package; Electronic equipment testing; Electronics packaging; Finite element methods; Lead; Materials testing; Performance analysis; Performance evaluation; Soldering; Stress; System testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Components and Technology Conference, 2009. ECTC 2009. 59th
Conference_Location :
San Diego, CA
ISSN :
0569-5503
Print_ISBN :
978-1-4244-4475-5
Electronic_ISBN :
0569-5503
Type :
conf
DOI :
10.1109/ECTC.2009.5074089
Filename :
5074089
Link To Document :
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