DocumentCode
2069669
Title
ASIC design for testability
Author
Braune, Dirk ; Ibarra, Dennis ; Courjon, Henri
Author_Institution
Philips Components, Eindhoven, Netherlands
fYear
1989
fDate
25-28 Sep 1989
Lastpage
40179
Abstract
Advanced testability techniques are described for ASIC (application-specific integrated circuit) design. BIST (built-in self-test), scan test, boundary scan, embedded cores, and mixed-signal circuitry are among the topics discussed. A CAE methodology and a specific case study are analyzed for each ASIC design choice. Emphasis is on modular design for test, automated testability analyses, and comprehensive pattern generation
Keywords
application specific integrated circuits; integrated circuit testing; ASIC; ASIC design; BIST; CAE methodology; application-specific integrated circuit; automated testability analyses; boundary scan; built-in self-test; case study; comprehensive pattern generation; design for testability; embedded cores; mixed mode ASIC; mixed-signal circuitry; modular design for test; scan test; testability techniques; Application specific integrated circuits; Automatic test pattern generation; Automatic testing; Built-in self-test; Circuit testing; Computer aided engineering; Design for testability; Integrated circuit testing; Pattern analysis; Test pattern generators;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC Seminar and Exhibit, 1989. Proceedings., Second Annual IEEE
Conference_Location
Rochester, NY
Type
conf
DOI
10.1109/ASIC.1989.123158
Filename
123158
Link To Document