Title :
A Phase-Interpolation and Quadrature-Generation Method Using Parametric Energy Transfer in CMOS
Author :
Bhardwaj, Kanupriya ; Lee, Thomas H.
Author_Institution :
Altera Corp., San Jose, CA, USA
Abstract :
This work focuses on generation of quadrature clocks with high phase accuracy and low noise, while reducing area and power consumption. The design objective is to make these quadrature oscillators suitable for applications in power- and area-constrained SOCs. We demonstrate in this work quadrature clock generation using parametric capacitance modulation in CMOS technology. We present a quadrature-generation method that is based on parametric energy transfer to an LC resonator. The phase-sensitive nature of parametric pumping is used to generate a signal in quadrature with an incoming clock signal. The design also provides the capability of phase interpolation about quadrature, which is useful in many applications. The detailed system implementation is demonstrated and experimentally verified through a prototype in 65 nm CMOS.
Keywords :
CMOS digital integrated circuits; integrated circuit design; interpolation; oscillators; resonators; system-on-chip; CMOS technology; LC resonator; area reduction; area-constrained SOC; design objective; incoming clock signal; parametric capacitance modulation; parametric energy transfer; parametric pumping; phase accuracy; phase interpolation capability; power consumption reduction; power-constrained SOC; quadrature clock generation; quadrature oscillators; quadrature-generation method; size 65 nm; Capacitance; Capacitors; Clocks; Energy exchange; Logic gates; MOS devices; Oscillators; Clock and data recovery circuits; clock generation; high-speed transceivers; parametric energy transfer; parametric system; phase interpolation; quadrature generation;
Journal_Title :
Circuits and Systems I: Regular Papers, IEEE Transactions on
DOI :
10.1109/TCSI.2015.2407433