• DocumentCode
    2070717
  • Title

    Thermal evaluation of a flip chip RF-PA for simulation-driven short-cycle re-design

  • Author

    Teng, Sue Y. ; Lee, Tien-Yu Tom

  • Author_Institution
    Adv. Interconnect Syst. Lab., Motorola Inc., Tempe, AZ, USA
  • fYear
    1997
  • fDate
    18-21 May 1997
  • Firstpage
    289
  • Lastpage
    295
  • Abstract
    The motivation behind this paper was to characterize the thermal performance of a silicon-based flip chip device via simulation techniques to support the development of an RF power amplifier (RF-PA) within a short cycle time. An initial trade-off thermal analysis was performed to assess the impact of bump location, “on” vs. “off” the active area of the chip, “thermal necking” in the bump at the bump-pad contact, and bump metallurgy, specifically a high thermally conductive alloy vs. a low thermally conductive solder. Results of the trade-off analysis will be reviewed. A subsequent device re-design effort of the RF-PA used a parametric simulation study to characterize the thermal performance of the entire module as a function of various design parameters. These parameters include the addition of underfill, the type of substrate material, and the design of the thermal via within the substrate. Since the thermal performance of this device was found to be worse than that for the GaAs flip chip version and also the silicon die bond version, a thermal study was performed to support the re design development process. For the thermal analysis, a finite volume computational fluid dynamics (CFD) methodology was implemented using a commercially available software tool. Initially, a model representing a local bump area of the die, including details of the passivation and metallization layers and consisting of 2 physical bumps, was generated to determine local thermal resistances. Subsequently, a global model incorporating the entire thermal test set-up was developed. This model then utilized the thermal resistances calculated from the local model rather than attempting to include such small geometries within the larger computational domain, which would lead to issues with aspect ratios as well as convergence. In addition, experimental measurements were used to validate the simulation results before the parametric study was conducted. Ultimately, this CFD simulation tool for thermal modeling allowed for much insight as to the thermal considerations of the device re-design and proved to be an essential tool in this short-cycle development process
  • Keywords
    finite element analysis; flip-chip devices; power amplifiers; radiofrequency amplifiers; thermal analysis; RF power amplifier; Si; bump-pad contact; finite volume computational fluid dynamics simulation; flip chip device; short-cycle re-design; soldering; thermal analysis; thermal necking; thermal resistance; thermal via; underfill; Computational fluid dynamics; Computational modeling; Flip chip; Performance analysis; Power amplifiers; Radio frequency; Radiofrequency amplifiers; Solid modeling; Thermal conductivity; Thermal resistance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference, 1997. Proceedings., 47th
  • Conference_Location
    San Jose, CA
  • ISSN
    0569-5503
  • Print_ISBN
    0-7803-3857-X
  • Type

    conf

  • DOI
    10.1109/ECTC.1997.606183
  • Filename
    606183