• DocumentCode
    2070855
  • Title

    LImbiC: An adaptable architecture description language model for developing an application-specific image processor

  • Author

    Tradowsky, Carsten ; Harbaum, Tanja ; Deyerle, Shaver ; Becker, Jurgen

  • Author_Institution
    Inst. for Inf. Process. Technol. (ITIV), Karlsruhe Inst. of Technol. (KIT), Karlsruhe, Germany
  • fYear
    2013
  • fDate
    5-7 Aug. 2013
  • Firstpage
    34
  • Lastpage
    39
  • Abstract
    Due to their ease of integration and widespread adoption, General Purpose Processors (GPP) are presently used in a wide range of applications. However, the highly flexible nature of a GPP leads to overhead in terms of power, performance and area for a specific application. Another approach, proposed by this paper, is to use Application-Specific Instruction-set Processors (ASIP) that are specifically adapted to a given application. To decrease development time and effort and consequently time-to-market, a model-based development process is used. The high-level model allows for automated generation of software development tools, simulation models and RTL models from a single source. An adaptable LISA model representing a simplified ARM Cortex-M1 processor is used as a base, which is then supplemented by application-specific features requested by the software developer or system architect. This paper presents a working example of this concept, in which a state-of-the-art processor model, we call LImbiC, is extended to meet the requirements of a specific application. Specifically, custom instructions are added to the LImbiC processor to improve its performance in the particular task of image processing. In addition, during the development process infrequently used or obsoleted instructions can be removed, which allows for separate versions of LImbiC to meet varying design goals within the design space exploration.
  • Keywords
    hardware description languages; image processing; instruction sets; microcontrollers; software tools; ASIP; GPP; LImbiC processor model; RTL models; adaptable LISA model; adaptable architecture description language model; application-specific image processor; application-specific instruction-set processors; design space exploration; general purpose processors; high-level model; image processing; model-based development process; simplified ARM Cortex-M1 processor; software development tools; system architect; Computer architecture; Convolution; Encoding; Field programmable gate arrays; Hardware; Image edge detection; Registers;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI (ISVLSI), 2013 IEEE Computer Society Annual Symposium on
  • Conference_Location
    Natal
  • ISSN
    2159-3469
  • Type

    conf

  • DOI
    10.1109/ISVLSI.2013.6654619
  • Filename
    6654619