DocumentCode
2070964
Title
Electrografted seed layers for metallization of deep TSV structures
Author
Raynal, F. ; Zahraoui, S. ; Frederich, N. ; Gonzalez, J. ; Couturier, B. ; Truzzi, C. ; Lerner, S.
Author_Institution
Alchimer SA, Massy
fYear
2009
fDate
26-29 May 2009
Firstpage
1147
Lastpage
1152
Abstract
This paper describes electrografted (eG) copper seed layers deposited on a wide range of Through Silicon Via (TSV) dimensions. Deposition is achieved on patterned substrates insulated with different materials (SiO2 for example) and covered by titanium or tantalum based diffusion barriers deposited by PVD, CVD or ALD. This eG technique is fully compatible with standard electroplating tools, either at 200 mm or 300 mm scale. Characterization of electrografted copper layers in vias with half pitch between 5 mum and 100 mum and aspect ratio from 1:1 to 10:1 is presented, with step coverage (ratio bottom/top thickness) going up to 100%. From these conformal eG seed layers, several examples of successful copper gap filling are shown, using conventional plating baths. Copper bulk properties have been studied by several techniques: sheet resistance measurement, mechanical stress analysis, X-Ray diffraction (XRD) and Electron backscattered diffraction (EBSD). Electrical properties of both electrografted copper and conventional plated copper (on top of PVD seed) are equivalent, which was predicted from the copper microstructure, similar for both copper deposition techniques. Contaminant levels in the copper bulk, observed by TOF- SIMS (time-of-flight secondary ion mass spectrometry), is lower in the case of eG copper compared to conventional plated copper, and especially the level of carbon, sulphur and chlorine. Some reliability tests have been performed with 50 mum*100 mum TSVs, looking to copper gap filling evolution after various thermal cycles, going up to 400degC. Work is ongoing to collect electrical data, using specific test vehicles integrating electrografted seed layers with design rules typical of TSV technology. AquiViatrade stack, under development at Alchimer, is presented at the end of the paper. AquiVia stack includes the insulator layer, the diffusion barrier and the copper seed, all these layers being deposited in a wet path using grafting technol- ogy.
Keywords
X-ray diffraction; electron backscattering; electroplating; metallisation; secondary ion mass spectroscopy; time of flight mass spectrometers; X-ray diffraction; deep TSV structures; electrografted seed layers; electron backscattered diffraction; electroplating tools; mechanical stress analysis; metallization; sheet resistance measurement; through silicon via; time-of-flight secondary ion mass spectrometry; Atherosclerosis; Copper; Filling; Insulation; Metallization; Silicon; Testing; Through-silicon vias; Titanium; X-ray diffraction;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Components and Technology Conference, 2009. ECTC 2009. 59th
Conference_Location
San Diego, CA
ISSN
0569-5503
Print_ISBN
978-1-4244-4475-5
Electronic_ISBN
0569-5503
Type
conf
DOI
10.1109/ECTC.2009.5074156
Filename
5074156
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