Design automation: pre-layout design verification and design submission for BiCMOS ASIC arrays

Author

White, Donnamaie E.

Author_Institution

Appl. Micro Circuits Corp., San Diego, CA, USA

fYear

1989

fDate

25-28 Sep 1989

Lastpage

39083

Abstract

Design automation tools that reduce design iterations, simulation interactions, and the time spent preparing the necessary design submission documentation are discussed. The design process up through design submission is reviewed in detail. Specifically, a structured design methodology is discussed in relation to current and future automated functions. The future is limited to the immediate 3-5 years. The three primary groups concerned with the design processes are examined. Factors relating to design and automation and design synthesis are described. Interconnect and design validation are also discussed

Keywords

BIMOS integrated circuits; application specific integrated circuits; circuit CAD; circuit layout CAD; integrated circuit technology; logic arrays; BiCMOS ASIC arrays; automated functions; design automation; design process; design submission; design synthesis; design validation; prelayout design verification; reduce design iterations; simulation interactions; structured design methodology; time reduction; Analytical models; Application specific integrated circuits; BiCMOS integrated circuits; Circuit faults; Circuit simulation; Circuit synthesis; Design automation; Design methodology; Process design; Workstations;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC Seminar and Exhibit, 1989. Proceedings., Second Annual IEEE

Conference_Location

Rochester, NY

Type

conf

DOI

10.1109/ASIC.1989.123163

Filename

123163