• DocumentCode
    2071012
  • Title

    Level synthesis approach to application-specific integrated circuits (ASIC) design

  • Author

    Levia, Oz

  • Author_Institution
    Honeywell Inc., Golden Valley, MN, USA
  • fYear
    1989
  • fDate
    25-28 Sep 1989
  • Lastpage
    39083
  • Abstract
    A high-level synthesis approach to ASIC design is presented. The tutorial focuses on the solutions a synthesis system can offer in an environment where ASIC design problems are becoming increasingly complex. In particular, it is shown how a synthesis system can help in shortening the design cycle and documentation of the design process and aid the design verification. The synthesis process is defined as applied to ASIC design. The benefits synthesis can offer an ASIC designer are discussed. The requirements that a synthesis approach places on the design process and the designer are discussed. A simplified design example is presented
  • Keywords
    application specific integrated circuits; circuit CAD; ASIC design; application-specific integrated circuits; design example; design verification; high-level synthesis approach; synthesis process; tutorial; Application specific integrated circuits; Constraint optimization; Design methodology; Hardware; Integrated circuit synthesis; Logic; Minimization; Processor scheduling; Routing; Silicon;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ASIC Seminar and Exhibit, 1989. Proceedings., Second Annual IEEE
  • Conference_Location
    Rochester, NY
  • Type

    conf

  • DOI
    10.1109/ASIC.1989.123164
  • Filename
    123164