Theoretical Analysis, Design and Prototyping of a Chaos-Based CDMA System Based on FPGA Technology

Code division multiple access (CDMA) technique can be applied in wireless sensor networks where the number of nodes can be extremely high. This paper presents a chaos-based CDMA transceiver prototype design based on the FPGA technology. The prototype was developed on Cyclone EP1C20F400C7 development board. Covering brief background theory of the chaotic communication systems, the paper evaluates logistic, cubic, sinusoidal, and piecewise chaotic maps for the multi-user system applications. The transmitter and correlation demodulator prototype were modeled in Verilog HDL. The logistic and piecewise chaotic sequence generators were successfully implemented on the FPGA For measuring system performance, a high speed white Gaussian noise generator was designed using Quantized Box-Muller method and probability of error characteristics were investigated for piecewise and logistic mapping. The curves obtained on the prototype are compared with the theoretically expected performances.