Evaluation of a module based memory system with an LCP flex interconnect

An LCP flex interconnect is used to bypass the core vias and balls of the memory controller package, the PTH vias and traces of the FR-4 motherboard and memory module, and the traditional through-hole or SMT DIMM connector. A mating two-piece pin-grid array connector that can accommodate 36 differential pair signals is used to interface the flex to the memory controller package. On the memory side, the DRAM CSP package is directly soldered to the top layer of the flex and the bottom layer of the flex is soldered to the memory module via solder balls. Controller and memory test chips that are capable of operating in the 10 to 16 Gbps range are used for evaluating the possible data rates for 6" and 12" long flex links. The system margins are compared to a 3" long motherboard-soldered memory system that was shown to operate at 16 Gbps.