Title :
EDAC. Proceedings of the European Design Automation Conference
Abstract :
The following topics were dealt with: testing tools; databases and frameworks; formal verification; scheduling and allocation; simulation languages; cell generators; compaction and circuit packing; combinational logic design optimisation; floor planning; high level synthesis; placement; delay and CMOS testing; data structures; physical verification; fault modelling; CAD; routing; test pattern generation and fault simulation; procedural interfaces; timing analysis; finite state machine synthesis; and PLA testing
Keywords :
automatic testing; built-in self test; circuit layout CAD; CAD; CMOS testing; PLA testing; allocation; cell generators; circuit packing; combinational logic design optimisation; compaction; data structures; databases; delay; fault modelling; fault simulation; finite state machine synthesis; floor planning; formal verification; frameworks; high level synthesis; physical verification; placement; procedural interfaces; routing; scheduling; simulation languages; test pattern generation; testing tools; timing analysis;
Conference_Titel :
Design Automation Conference, 1990., EDAC. Proceedings of the European
Conference_Location :
Glasgow, UK
Print_ISBN :
0-8186-2024-2
DOI :
10.1109/EDAC.1990.136609
