The Design and Implement of Memory Manager in STM

Software transactional memory (STM) is one of the promising models in parallel programming for multi-core processor system and has being studied by many researchers. Memory management is an important aspect of STM system design which affects the performance of the whole STM system directly. This paper presents the design and implementation of an effective memory manager. It uses private heap to manage transactions´ memory space of each thread and a global heap to manage the whole memory space in STM system. Algorithms ensure that the memory access is no-blocking. Tests show that performance of the memory manager is satisfying.