DocumentCode :
2072200
Title :
Signal integrity modeling and measurement of TSV in 3D IC
Author :
Joohee Kim ; Joungho Kim
Author_Institution :
Dept. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol. (KAIST), Daejeon, South Korea
fYear :
2013
fDate :
22-25 Jan. 2013
Firstpage :
13
Lastpage :
16
Abstract :
In order to guarantee signal integrity of a TSV-based channel in 3D IC design, the modeling and measurements are conducted for electrical characterization of the TSV-based channel including TSVs and RDLs with various performance metrics such as insertion loss, noise coupling and eye diagrams. Based on the modeling and measurements of the fabricated TSV channels, design guide for the signal integrity of the channel is proposed.
Keywords :
integrated circuit design; three-dimensional integrated circuits; 3D IC design; TSV measurement; TSV-based channel; electrical characterization; eye diagram; insertion loss; noise coupling; performance metrics; signal integrity modeling; Integrated circuit interconnections; Integrated circuit modeling; Metals; Silicon; Substrates; Three-dimensional displays; Through-silicon vias;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference (ASP-DAC), 2013 18th Asia and South Pacific
Conference_Location :
Yokohama
ISSN :
2153-6961
Print_ISBN :
978-1-4673-3029-9
Type :
conf
DOI :
10.1109/ASPDAC.2013.6509551
Filename :
6509551
Link To Document :
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