Power distribution network modeling for 3-D ICs with TSV arrays

Author

Chi-Kai Shen ; Yi-Chang Lu ; Yih-Peng Chiou ; Tai-Yu Cheng ; Tzong-Lin Wu

Author_Institution

Grad. Inst. of Commun. Eng., Nat. Taiwan Univ., Taipei, Taiwan

fYear

2013

fDate

22-25 Jan. 2013

Firstpage

17

Lastpage

22

Abstract

A coupling node insertion method (CNIM) is proposed to handle electrical coupling between top metals of on-chip interconnects and silicon substrate surfaces in three-dimensional integrated circuits (3-D ICs). This coupling effect should not be neglected especially as metal area is intentionally increased in order to reduce resistance values. In this paper, we illustrate how to build the CNIM model and incorporate it into power distribution networks. The CNIM model is validated by comparing our results to the one obtained from a full-wave simulator. The differences between two approaches are within 5% but our computation time is shorter than that required by a full-wave simulator.

Keywords

distribution networks; substrates; three-dimensional integrated circuits; 3D IC; 3D integrated circuits; CNIM model; TSV arrays; coupling node insertion method; electrical coupling; full wave simulator; on-chip interconnects; power distribution network modeling; silicon substrate; Capacitance; Couplings; Equivalent circuits; Integrated circuit modeling; Metals; Silicon; Substrates;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference (ASP-DAC), 2013 18th Asia and South Pacific

Conference_Location

Yokohama

ISSN

2153-6961

Print_ISBN

978-1-4673-3029-9

Type

conf

DOI

10.1109/ASPDAC.2013.6509552

Filename

6509552