Title :
Cu lateral interconnects formed between 100-µm-thick self-assembled chips on flexible substrates
Author :
Murugesan, M. ; Bea, J.C. ; Fukushima, T. ; Konno, T. ; Kiyoyama, K. ; Jeong, W.-C. ; Kino, H. ; Noriki, A. ; Lee, K.-W. ; Tanaka, T. ; Koyanagi, M.
Author_Institution :
Dept. of Bioeng. & Robot., Tohoku Univ., Sendai
Abstract :
A very new interconnection method, namely Cu lateral interconnection is proposed and tested for the heterogeneous multi-chip module integration in which MEMS and LSI chips are self assembled onto the flexible substrate. Here, the lateral interconnects runs between a few hundred microns thick chip and the Si or flexible substrates as well as at inter chip level. These Cu lateral interconnects were fabricated via conventional electroplating technique. As formed single as well as daisy chain lateral interconnects (both are crossing over the thick test chips that are face-up bonded onto the flexible substrates by self-assembly) were characterized for their electrical characteristics. We have obtained a low resistance values for the Cu lateral interconnects which are close to the calculated values. Further, a module contains RF test chips that are interconnected by this unique Cu lateral interconnections has been tested for the operation.
Keywords :
chip scale packaging; copper; electroplating; integrated circuit interconnections; multichip modules; self-assembly; Cu; RF test chips; Si; daisy chain lateral interconnects; electroplating; face-up bonding; flexible substrates; heterogeneous multi-chip module integration; inter chip level; resistance; self-assembly; thick test chips; Automatic testing; Bonding; Copper; Large scale integration; Packaging; Stacking; Substrates; Temperature; Through-silicon vias; Wire;
Conference_Titel :
Electronic Components and Technology Conference, 2009. ECTC 2009. 59th
Conference_Location :
San Diego, CA
Print_ISBN :
978-1-4244-4475-5
Electronic_ISBN :
0569-5503
DOI :
10.1109/ECTC.2009.5074210