DocumentCode :
2073169
Title :
A unified approach to eliminate memory accesses early
Author :
Islam, Mafijul Md ; Stenstrom, Per
Author_Institution :
Software Platforms, Mechatron., Volvo Technol. Corp., Sweden
fYear :
2011
fDate :
9-14 Oct. 2011
Firstpage :
55
Lastpage :
64
Abstract :
This paper introduces the notion of silent loads to classify load accesses that can be satisfied by already available values of the physical register file and proposes a new architectural concept to exploit such loads. The paper then unifies different approaches of eliminating memory accesses early by contributing with a new architectural scheme. We show that our unified approach covers previously proposed techniques of exploiting forwarded and small-value loads in addition to silent loads. Forwarded loads obtain values through load-to-load and store-to-load forwarding whereas small-value loads return small values that can be coded with 8 bits or less. We find that 22%, 31% and 24% of all dynamic loads are forwarded, small-value and silent, respectively. We demonstrate that the prevalence of such loads is mostly inherent in applications. We establish that a hypothetical scheme that encompasses all the categories can eliminate as many as 42% of all dynamic loads and about 18% of all committed stores. Finally, we contribute with a new architectural technique to implement the unified scheme. We show that our proposed scheme reduces execution time to provide noticeable speedup and reduces overall energy dissipation with very low area overhead.
Keywords :
memory architecture; power aware computing; storage management; architectural scheme; dynamic loads; early memory access elimination; energy dissipation reduction; forwarded loads; load access classification; load-to-load forwarding; physical register file; silent loads; small-value loads; store-to-load forwarding; unified scheme; Art; Memory management; Pipelines; Program processors; Radio frequency; Registers; Static VAr compensators; Forwarded Load; Silent Load; Silent Store; Small-Value Load;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Compilers, Architectures and Synthesis for Embedded Systems (CASES), 2011 Proceedings of the 14th International Conference on
Conference_Location :
Taipei
Print_ISBN :
978-1-4503-0713-0
Type :
conf
Filename :
6062031
Link To Document :
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