Design of smart piezoresistive pressure sensor

Author

Jung, Hu-Min ; Cho, Sang-Bock ; Lee, Jong-Hwa

Author_Institution

Sch. of Electr. Electron. & Inf. Syst. Eng., Ulsan Univ., South Korea

Volume

1

fYear

2001

fDate

26 Jun-3 Jul 2001

Firstpage

202

Abstract

A silicon piezo-resistive smart pressure sensor is designed for implementation with a 0.6 μm double poly double metal CMOS process. This smart sensor is composed of a diaphragm with piezoresistive resistors, Wheatstone bridge and circuitry composed of op-amp, A/D converter and UART. The relationship between the bridge output voltage and the mechanical stress due to pressure was studied by simulating the stress distribution on the diaphragm with the COSMOS-M package program. The CMOS op-amp circuit was designed with different transistor sizes to obtain the defined output characteristics and simulated with HSPICE. The A/D converter was designed using a neuron MOSFET structure and a sub-ranging method to minimize the chip area. The UART circuit was designed using VHDL source code and cell library by synthesizing with Synopsys, and the physical layout of the circuit is designed with Mentor tools. The temperature compensation and output-offset problem are to be studied further

Keywords

CMOS integrated circuits; SPICE; analogue-digital conversion; circuit simulation; data communication equipment; electric sensing devices; elemental semiconductors; hardware description languages; integrated circuit design; intelligent sensors; neural chips; operational amplifiers; piezoresistive devices; pressure sensors; silicon; 0.6 micron; A/D converter; CMOS op-amp circuit; COSMOS-M package program; HSPICE; Mentor tools; Si; Synopsys synthesis; UART; VHDL cell library; VHDL source code; Wheatstone bridge; bridge output voltage; chip area minimization; diaphragm; diaphragm stress distribution; double poly double metal CMOS process; mechanical stress; neuron MOSFET structure; op-amp; output characteristics; output-offset problem; physical layout; piezo-resistive resistors; silicon piezo-resistive smart pressure sensor; smart piezoresistive pressure sensor design; temperature compensation; transistor sizes; Bridge circuits; CMOS process; Circuit simulation; Intelligent sensors; Mechanical sensors; Operational amplifiers; Piezoresistance; Resistors; Silicon; Stress;

fLanguage

English

Publisher

ieee

Conference_Titel

Science and Technology, 2001. KORUS '01. Proceedings. The Fifth Russian-Korean International Symposium on

Conference_Location

Tomsk

Print_ISBN

0-7803-7008-2

Type

conf

DOI

10.1109/KORUS.2001.975100

Filename

975100