DocumentCode
2073969
Title
Synthesis of delay functions in DSP compilers
Author
Delaruelle, A. ; McArdle, O. ; van Meerbergen, J. ; Niessen, C.
Author_Institution
Philips Res. Labs., Eindhoven, Netherlands
fYear
1990
fDate
12-15 Mar 1990
Firstpage
68
Lastpage
72
Abstract
An efficient method for the synthesis of delay lines is reported. The solution is based on a well-defined way of organising the data in memory which allows an efficient synthesis of delayed arrays and has been implemented in a DSP compiler. Examples demonstrate that the efficiency of the automatic implementation is comparable to manual solutions
Keywords
circuit layout CAD; delay lines; digital signal processing chips; DSP compilers; delay functions synthesis; delay lines; delayed arrays; Decoding; Delay lines; Digital signal processing; Digital signal processing chips; Error correction; Hardware; Process design; Reed-Solomon codes; Sampling methods; Specification languages;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1990., EDAC. Proceedings of the European
Conference_Location
Glasgow
Print_ISBN
0-8186-2024-2
Type
conf
DOI
10.1109/EDAC.1990.136622
Filename
136622
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