Delay and throughput analysis of the high speed variable length self-routing packet switch

In this paper, we analyze the performance of a high-speed variable length self-routing packet switch. Conventional crossbar switches need a powerful central control unit, complex matching algorithms, and speed up to have high throughput and low delay. Contrary, in this switch the routing function is performed by each switching element with an address correlator. In addition this switch employs multiplane structure and input port expansion scheme to alleviate head of line (HOL) blocking. We study delay, and throughput of this switch for various numbers of planes and expansion ratio under uniform traffic assumption. Results show that with reasonable number of planes and expansion ratio, the self-routing switch performs almost the same as output queue (OQ) switches, which have low input delay and 100% throughput. The simulation results agree with the analytical calculation very well.