DocumentCode
2075247
Title
Influence of reflow profile and Pb-free solder paste in minimizing voids for Quad Flat Pack No-lead (QFN) assembly
Author
Gadepalli, Harish ; Dhanasekaran, Rangaraj ; Ramkumar, S. Manian ; Jensen, Tim ; Briggs, Ed
Author_Institution
Center for Electron. Manuf. & Assembly, Rochester Inst. of Technol., Rochester, NY
fYear
2009
fDate
26-29 May 2009
Firstpage
2016
Lastpage
2024
Abstract
Quad Flatpack No lead (QFN) packages have become a popular choice in electronics packaging due to its small form factor. They are also gaining rapid industry acceptance because of its excellent thermal and electrical performance. The bottom side of the QFN package has a large thermal pad. This exposed die attach pad effectively conducts heat to the PCB and also provides a stable ground connection. Effective soldering of this surface to the pad on the PCB is required for good thermal dissipation and component functionality. The exposed thermal pad presents various challenges during the surface mount assembly process. One major challenge is solder void formation. Voids are primarily formed due to the entrapment of volatiles in flux outgassing during the reflow process. The primary objective of this study is to determine optimal parameters to minimize void formation in QFN packages (QFN16 and QFN20), specifically the reflow profile, leadfree solder paste and stencil aperture opening for the thermal pad. A systematic DOE based approach was used to arrive at conclusions, using the ratio of void volume on the thermal pad to the actual volume of solder paste printed as the response variable. Various graphs are presented to understand the impact of different parameters. Interaction graphs were used to determine optimal settings for each parameter.
Keywords
electronics packaging; reflow soldering; voids (solid); electronics packaging; lead free solder paste; quad flat pack no-lead assembly; reflow profile; solder void formation; Apertures; Assembly; Electronic packaging thermal management; Electronics packaging; Environmentally friendly manufacturing techniques; Indium; Lead; Probes; Soldering; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Components and Technology Conference, 2009. ECTC 2009. 59th
Conference_Location
San Diego, CA
ISSN
0569-5503
Print_ISBN
978-1-4244-4475-5
Electronic_ISBN
0569-5503
Type
conf
DOI
10.1109/ECTC.2009.5074299
Filename
5074299
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