DocumentCode :
2075433
Title :
ShieldUS: A novel design of dynamic shielding for eliminating 3D TSV crosstalk coupling noise
Author :
Yuan-Ying Chang ; Huang, Yoshi Shih-Chieh ; Narayanan, Vijaykrishnan ; Chung-Ta King
Author_Institution :
Dept. of Comput. Sci., Nat. Tsing Hua Univ., Hsinchu, Taiwan
fYear :
2013
fDate :
22-25 Jan. 2013
Firstpage :
675
Lastpage :
680
Abstract :
3D IC is a promising technology to meet the demands of high throughput, high scalability, and low power consumption for future generation integrated circuits. One way to implement the 3D IC is to interconnect layers of two-dimensional (2D) IC with Through-Silicon Via (TSV), which shortens the signal lengths. Unfortunately, while TSVs are bundled together as a cluster, the crosstalk coupling noise may lead to transmission errors. As a result, the working frequency of TSVs has to be lowered to avoid the errors, leading to narrower bandwidth that TSVs can provide. In this paper, we first derive the crosstalk noise model from the perspective of 3D chip and then propose ShieldUS, a runtime data-to-TSVs remapping strategy. With ShieldUS, the transition patterns of data over TSVs are observed at runtime, and relatively stable bits will be mapped to the TSVs which act as shields to protect the other bits which have more fluctuations. We evaluate the performance of ShieldUS with address lines from real benchmark traces and data lines of different similarities. The results show that ShieldUS is accurate and flexible. We further study dynamic shielding and our design of Interval Equilibration Unit (IEU) can intelligently select suitable parameters for dynamic shielding, which makes dynamic shielding practical and does not need to predefine parameters. This also improves the practicability of ShieldUS.
Keywords :
crosstalk; integrated circuit noise; low-power electronics; shielding; three-dimensional integrated circuits; 2D IC; 3D IC; 3D TSV crosstalk coupling noise; 3D chip; ShieldUS; dynamic shielding; integrated circuits; interval equilibration unit; low power consumption; through silicon via; transmission errors; Crosstalk; Equations; Mathematical model; Noise; Solid modeling; Three-dimensional displays; Through-silicon vias;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference (ASP-DAC), 2013 18th Asia and South Pacific
Conference_Location :
Yokohama
ISSN :
2153-6961
Print_ISBN :
978-1-4673-3029-9
Type :
conf
DOI :
10.1109/ASPDAC.2013.6509678
Filename :
6509678
Link To Document :
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