Title :
Effects of Dit-induced degradation on InGaAs/InAlAs Nanowire Superlattice-FET using Al2O3 and HfO2/La2O3 as gate stacks
Author :
Maiorano, P. ; Gnani, E. ; Gnudi, A. ; Reggiani, S. ; Baccarani, G.
Author_Institution :
DEI, Univ. of Bologna, Bologna, Italy
Abstract :
In this work we investigate the effects of different interface trap density distributions (Dit) on the electrical and power performances of a Gate-All-Around In0.53Ga0.47As/In0.52Al0.48As Nanowire Superlattice-FETs (GAA NW SL-FET) using Al2O3 and HfO2/La2O3 as gate dielectrics. This analysis shows that a high At content at the high-K/InGaAs interface causes degradation of the subthreshold characteristics and drive current, but also an improvement of the OFF-state leakage. However, even in the presence of traps, dynamic energy/power consumption of the Al2O3-based SL-FET is predicted to be at least 2× lower than all the ITRS requirements for the 9nm technology node, while HfO2/La2O3-based device is perfectly suitably for Low-Standby-Power application, at fixed supply voltage Vdd = 0.4 V.
Keywords :
aluminium compounds; field effect transistors; gallium arsenide; hafnium compounds; indium compounds; lanthanum compounds; nanowires; semiconductor superlattices; Al2O3; Dit-induced degradation; GAA NW SL-FET; HfO2-La2O3; ITRS requirements; InGaAs-InAlAs; OFF-state leakage; gate dielectrics; gate stacks; gate-all-around nanowire superlattice-FET; interface trap density distributions; low-standby-power application; nanowire superlattice-FET; size 9 nm; voltage 0.4 V; Aluminum oxide; Degradation; Hafnium compounds; Indium gallium arsenide; Logic gates; Performance evaluation;
Conference_Titel :
Ultimate Integration on Silicon (EUROSOI-ULIS), 2015 Joint International EUROSOI Workshop and International Conference on
Conference_Location :
Bologna
DOI :
10.1109/ULIS.2015.7063772
