DocumentCode
2075544
Title
MINT-a VHDL simulation system
Author
Altmäe, Mart
Author_Institution
Swedish Inst. of Microelectron., Stockholm, Sweden
fYear
1990
fDate
12-15 Mar 1990
Firstpage
102
Lastpage
106
Abstract
Several commercial VHDL simulators have been reported. Many of these however only support a subset of the language. This paper describes the development of a Multilevel Interactive (MINT) simulator that was designed from scratch specifically for VHDL. A brief overview of the complete is given first. Then generation of executable code for simulation purposes, and some VHDL specific features of the simulation kernel, are described
Keywords
circuit analysis computing; simulation languages; specification languages; MINT; Multilevel Interactive; VHDL simulation system; simulation kernel; simulators; Data models; Data structures; Environmental management; Government; Information technology; Kernel; Microelectronics; Monitoring; Packaging; Virtual prototyping;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1990., EDAC. Proceedings of the European
Conference_Location
Glasgow
Print_ISBN
0-8186-2024-2
Type
conf
DOI
10.1109/EDAC.1990.136628
Filename
136628
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