DocumentCode
2075771
Title
Investigation of performance limiting factors of sub-10nm III-V FinFETs
Author
Peijie Feng ; Narayanan, Sudarshan ; Pandey, Shesh Mani ; Sahu, Bhagawan ; Benistant, Francis ; Towie, Ewan ; Alexander, Craig ; Amoroso, Salvatore M. ; Asenov, Asen
Author_Institution
Global Foundries Inc., Malta, NY, USA
fYear
2015
fDate
26-28 Jan. 2015
Firstpage
105
Lastpage
108
Abstract
As scaling of transistor continues, there is strong impetus to replace Si with attractive alternate channel materials like InGaAs that would provide high on-current at low voltages. However, many key technology issues need to be addressed and in this paper, we present a rigorous investigation into the performance limiting factors of III-V FinFETs using a 3D Monte-Carlo simulation methodology.
Keywords
III-V semiconductors; MOSFET; Monte Carlo methods; elemental semiconductors; gallium arsenide; indium compounds; silicon; 3D Monte-Carlo simulation; InGaAs; Si; channel materials; size 10 nm; transistor scaling; FinFETs; Potential well; Predictive models; Semiconductor process modeling; Solid modeling; Three-dimensional displays; III-V FinFETs; Monte Carlo simulation; TCAD; nanoscale devices; quantum corrections;
fLanguage
English
Publisher
ieee
Conference_Titel
Ultimate Integration on Silicon (EUROSOI-ULIS), 2015 Joint International EUROSOI Workshop and International Conference on
Conference_Location
Bologna
Type
conf
DOI
10.1109/ULIS.2015.7063784
Filename
7063784
Link To Document