DocumentCode
2075935
Title
Implementing microprocessors from simplified descriptions
Author
Patil, N.A. ; Chiou, Derek
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of Texas at Austin, Austin, TX, USA
fYear
2013
fDate
22-25 Jan. 2013
Firstpage
787
Lastpage
793
Abstract
Despite the proliferation of high-level synthesis tools, hardware description of microprocessors remains complex. We argue that much of the incidental complexity can be relieved by untangling the description into separate functional and microarchitectural components. Such an untangling can be achieved using a high-level microcode compiler that can generate not only microcode, but also the micro-instruction format and the interpretations of each control bit. Simplifying hardware description will help the designer make better design-space trade-offs, and close the design and verification loop faster. This paper takes the reader through an implementation of a simple Y86 processor to qualitatively illustrate the complexity reduction from the untangling.
Keywords
firmware; formal verification; high level synthesis; microprocessor chips; program compilers; Y86 processor; complexity reduction; control bit; design-space trade-offs; functional components; hardware description; high-level microcode compiler; high-level synthesis tools; micro-instruction format; microarchitectural components; microprocessors; simplified descriptions; verification loop; Arrays; Hardware; Microarchitecture; Pipelines; Radio frequency; Registers; Syntactics;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference (ASP-DAC), 2013 18th Asia and South Pacific
Conference_Location
Yokohama
ISSN
2153-6961
Print_ISBN
978-1-4673-3029-9
Type
conf
DOI
10.1109/ASPDAC.2013.6509696
Filename
6509696
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