Title :
Characterization of bonding surface and electrical insulation properties of inter layer dielectrics for 3D monolithic integration
Author :
Garidis, K. ; Jayakumar, G. ; Asadollahi, A. ; Dentoni Litta, E. ; Hellstrom, P.-E. ; Ostling, M.
Author_Institution :
Sch. of ICT, KTH (R. Inst. of Technol.), Kista, Sweden
Abstract :
We investigate the bonding and electrical insulation properties of oxide layers for use in 3D monolithic integration via direct wafer bonding. Low surface roughness layers deposited on 100 mm Si wafers by atomic layer deposition (ALD) at 200 °C-350 °C, provide with adequate layer transfer bonding interfaces. Wafer scale IV measurements were performed to investigate the leakage current. We demonstrate that ALD oxide can function as a reliable bonding surface and also exhibit leakage current values below the nA range. Both properties are important pillars for a successful 3D monolithic integration.
Keywords :
atomic layer deposition; dielectric materials; elemental semiconductors; insulation; leakage currents; monolithic integrated circuits; silicon; three-dimensional integrated circuits; wafer bonding; 3D monolithic integration; ALD oxide; Si; atomic layer deposition; bonding surface characterization; direct wafer bonding; electrical insulation property; interlayer dielectric; layer transfer bonding interface; leakage current; oxide layer; size 100 mm; surface roughness layer; temperature 200 C to 350 C; wafer scale IV measurement; Bonding; Dielectrics; Metals; Rough surfaces; Surface roughness; Surface treatment; Three-dimensional displays; 3D integration; Ge; GeOI; atomic layer deposition; current leakage; defects; inter layer dielectrics; monolithic; strained Ge; wafer bonding;
Conference_Titel :
Ultimate Integration on Silicon (EUROSOI-ULIS), 2015 Joint International EUROSOI Workshop and International Conference on
Conference_Location :
Bologna
DOI :
10.1109/ULIS.2015.7063799
