DocumentCode
2076255
Title
Transistor placement and interconnect algorithms for leaf cell synthesis
Author
Lefebvre, Martin ; Chan, Chong ; Martin, Grant
Author_Institution
Dept. of Electron., Carleton Univ., Ottawa, Ont., Canada
fYear
1990
fDate
12-15 Mar 1990
Firstpage
119
Lastpage
123
Abstract
Picasso is a prototype leaf cell synthesis system capable of mapping a gate level description into a complete set of layout masks, based on the line of diffusion layout style. This paper describes Picasso´s algorithms for transistor placement and routing of internal nets. The transistor placement algorithm uses a composite metric which applies connectivity and optimal chaining considerations simultaneously. The routing algorithm is capable of routing over transistor chains and makes efficient use of residual routing areas resulting from unequal transistor sizes
Keywords
circuit layout CAD; Picasso; composite metric; connectivity; gate level description; layout masks; leaf cell synthesis; optimal chaining; residual routing; routing; transistor placement; Circuit synthesis; Compaction; Geometry; Integrated circuit interconnections; Inverters; Logic gates; Prototypes; Routing; Sequential circuits; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1990., EDAC. Proceedings of the European
Conference_Location
Glasgow
Print_ISBN
0-8186-2024-2
Type
conf
DOI
10.1109/EDAC.1990.136631
Filename
136631
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