DocumentCode :
2076646
Title :
Improved analog operation of junctionless nanowire transistors using back bias
Author :
Trevisoli, R. ; Doria, R.T. ; de Souza, M. ; Pavanello, M.A.
Author_Institution :
Electr. Eng. Dept., Centra Univ. da FEI, Sao Bernardo, Brazil
fYear :
2015
fDate :
26-28 Jan. 2015
Firstpage :
265
Lastpage :
268
Abstract :
This work reports, for the first time, an analysis of substrate bias on the analog parameters of Junctionless Nanowire Transistors operating as single transistor amplifiers through experimental and simulated data. The study is performed in terms of output conductance, transconductance, open loop voltage gain and transconductance to the drain current ratio. It has been shown that the substrate bias can affect significantly the performance of junctionless devices, such that the positive back bias can reduce the output conductance and improve the voltage gain.
Keywords :
analogue integrated circuits; electric admittance; nanowires; analog operation; analog parameters; back bias; drain current ratio; junctionless devices; junctionless nanowire transistors; open loop voltage gain; output conductance; single transistor amplifiers; substrate bias; Gain; Logic gates; Performance evaluation; Substrates; Threshold voltage; Transconductance; Transistors; Analog Operation; Junctionless Transistors; Substrate Bias;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Ultimate Integration on Silicon (EUROSOI-ULIS), 2015 Joint International EUROSOI Workshop and International Conference on
Conference_Location :
Bologna
Type :
conf
DOI :
10.1109/ULIS.2015.7063824
Filename :
7063824
Link To Document :
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