DocumentCode
2076809
Title
Determination of ad hoc deposited charge on bare SOI wafers
Author
Fernandez, C. ; Rodriguez, N. ; Marquez, C. ; Gamiz, F.
Author_Institution
Nanoelectron. Res. Group, CITIC-Univ. of Granada, Granada, Spain
fYear
2015
fDate
26-28 Jan. 2015
Firstpage
289
Lastpage
292
Abstract
This work develops an analytical model which correlates the changes of the threshold voltages in Pseudo-MOSFET structures with the charge intentionally placed on the surface of the native oxide. The model has been validated through experimental I-V characteristics obtained when the surface is physically altered with an APTES solution. The measurements were performed in 15 MESA isolated SOI cells. These results open the path for the potential use of the bare SOI wafers as a platform for charge-based sensing applications.
Keywords
MOSFET; semiconductor device models; silicon-on-insulator; APTES solution; I-V characteristics; SOI cells; SOI wafers; ad hoc deposited charge; charge-based sensing; native oxide; pseudo-MOSFET structure; threshold voltage; Charge carrier processes; Electric potential; Films; Semiconductor device modeling; Silicon; Surface treatment; Threshold voltage; Pseudo-MOSFET; SOI; charge sensing; threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Ultimate Integration on Silicon (EUROSOI-ULIS), 2015 Joint International EUROSOI Workshop and International Conference on
Conference_Location
Bologna
Type
conf
DOI
10.1109/ULIS.2015.7063830
Filename
7063830
Link To Document