• DocumentCode
    2077119
  • Title

    Distance-aware L2 cache organizations for scalable multiprocessor systems

  • Author

    Chung, Sung Woo ; Kim, Hyong-Shik ; Jhon, Chu Shik

  • Author_Institution
    Sch. of Comput. Sci. & Eng., Seoul Nat. Univ., South Korea
  • fYear
    2003
  • fDate
    1-6 Sept. 2003
  • Firstpage
    24
  • Lastpage
    32
  • Abstract
    In this paper, we suggest an LRU/distance-aware combined second-level (L2) cache for scalable CC-NUMA multiprocessors, which is composed of a traditional LRU cache and an additional cache maintaining the distance information of individual cache blocks. The LRU cache selects a victim using age information, while the distance-aware cache does this using distance information. Both work together to reduce the overall distance effectively upon cache misses by keeping long-distance blocks as well as recently used blocks. It has been observed that the proposed cache outperforms the traditional LRU cache by up to 28% in the execution time. It is also found to perform even better than an LRU cache of twice the size.
  • Keywords
    cache storage; multiprocessing systems; LRU cache; cache blocks; cache misses; distance-aware L2 cache organization; long-distance blocks; scalable CC NUMA multiprocessors; scalable multiprocessor system; Computer science; Delay; Digital systems; Hardware; Multiprocessing systems; Sections; Telecommunication traffic;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Digital System Design, 2003. Proceedings. Euromicro Symposium on
  • Conference_Location
    Belek-Antalya, Turkey
  • Print_ISBN
    0-7695-2003-0
  • Type

    conf

  • DOI
    10.1109/DSD.2003.1231896
  • Filename
    1231896