DocumentCode
2077253
Title
IEEE-1149.1 use in design for verification and testability at Texas Instruments
Author
Cron, Adam D.
Author_Institution
Texas Instrum., Waltham, MA, USA
fYear
1989
fDate
25-28 Sep 1989
Lastpage
38353
Abstract
Products aimed at standardization and cost reduction of IC and system test and debug, compatible with the JTAG/IEEE-1149.1 scan protocols and standards, are discussed. Included are ASIC (application-specific integrated circuit) cells, standard interface ICs, a bus master IC, a controller interface board for IBM compatibles, a high-speed scan interface, and software to control the scan bus. Tradeoffs to be looked at when using the JTAG/IEEE-1149.1 standard for ASIC are evaluated
Keywords
application specific integrated circuits; automatic testing; computer interfaces; integrated circuit testing; protocols; standards; ASIC; IBM compatibles; IC testing; JTAG/IEEE-1149.1 standard; Texas Instruments; bus master IC; controller interface board; cost reduction; design for testability; design for verification; high-speed scan interface; scan bus; scan protocols; standard interface ICs; standardization; Application specific integrated circuits; Circuit testing; Electronic equipment testing; Instruments; Integrated circuit testing; Logic devices; Pattern analysis; Protocols; Standardization; System testing;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC Seminar and Exhibit, 1989. Proceedings., Second Annual IEEE
Conference_Location
Rochester, NY
Type
conf
DOI
10.1109/ASIC.1989.123190
Filename
123190
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