DocumentCode
2077564
Title
A VLSI floorplanner based on `balloon´ expansion
Author
Yonezawa, Noritake ; Nishiguchi, Nobuyuki ; Etani, Atsushi ; Tsukuda, Fumiaki ; Hashishita, Ryuichi
Author_Institution
NEC Corp., Kanagawa, Japan
fYear
1990
fDate
12-15 Mar 1990
Firstpage
257
Lastpage
261
Abstract
A novel floorplanning method is presented that models blocks as rectangular `balloons´, which are gradually expanded to determine their shapes and placement. Unlike the existing approaches, which assume the floorplan to be a slicing structure or which never handle fixed-shaped blocks, this method can handle fixed-shaped blocks as well as variable-shaped blocks on a general (non-slicing) layout structure. Experimental results show that the proposed method works effectively and gives an accurate estimate of chip area with only 3 to 6 percent difference from final layout, especially when the fixed- and variable-shaped blocks are mixed
Keywords
VLSI; circuit layout CAD; VLSI floorplanner; balloon expansion; placement; shapes; slicing structure; Chip scale packaging; Iterative algorithms; National electric code; Programmable logic arrays; Reactive power; Routing; Shape; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1990., EDAC. Proceedings of the European
Conference_Location
Glasgow
Print_ISBN
0-8186-2024-2
Type
conf
DOI
10.1109/EDAC.1990.136655
Filename
136655
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