DocumentCode
2078006
Title
A dynamically reconfigurable accelerator for operations over Boolean and ternary vectors
Author
Sklyarov, Valery ; Skliarova, Iouliia ; Oliveira, Arnaldo ; Ferrari, António B.
Author_Institution
Dept. of Electron. & Telecommun., Univ. of Aveiro, Portugal
fYear
2003
fDate
1-6 Sept. 2003
Firstpage
222
Lastpage
229
Abstract
This paper suggests a novel architecture for a reconfigurable accelerator for computations over discrete vectors. The number of executed operations is limited but they can arbitrarily be chosen from a practically unlimited set of feasible operations. The software model and hardware implementations of the accelerator are discussed in detail.
Keywords
Boolean functions; digital circuits; logic design; reconfigurable architectures; ternary logic; Boolean vector; discrete vectors; feasible operations; reconfigurable accelerator; ternary vectors; Combinational circuits; Computer architecture; Cryptography; Data compression; Digital systems; Electron accelerators; Hardware; Registers; Software libraries; Telecommunication computing;
fLanguage
English
Publisher
ieee
Conference_Titel
Digital System Design, 2003. Proceedings. Euromicro Symposium on
Conference_Location
Belek-Antalya, Turkey
Print_ISBN
0-7695-2003-0
Type
conf
DOI
10.1109/DSD.2003.1231930
Filename
1231930
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