Design and implementation of a CPLD-based SVPWM ASIC for variable-speed control of AC motor drives

In this paper, we present the design and implementation of an SVPWM ASIC for variable-speed control of AC motor drives, employing an Altera FLEX 10K100A CPLD device. Given the d-q axes sinusoidal references from the EPROM look-up tables, the ASIC can generate alternating-reversing switching PWM sequences to control the motor speed. The firing times of the PWM sequences are functions of the switching period, the DC bus voltage, and the component voltage of the reference vector. The computation of the functions is simple, and hence can be easily carried out by digital hardware. Simulation and experimental results show the performance of the proposed SVPWM ASIC.