Title :
ECL and CMOS ASICs for time-to-digital conversion
Author :
Kostamovaara, Juha ; Määttä, Kari ; Rahkonen, Timo ; Rankinen, Riitta
Author_Institution :
Dept. of Electr. Eng., Oulu Univ., Finland
Abstract :
ECL (emitter-coupled logic) and CMOS ASICs (application-specific integrated circuits) that are designed for short time interval measurements are presented. An ECL gate array designed for a time-to-digital converter based on analog interpolation techniques and constructed by discrete techniques in order to reduce its power consumption and circuit board area is described. The design and test of an integrated seven bit time-to-digital converter (TDC) based on tapped CMOS delay lines is also presented
Keywords :
CMOS integrated circuits; analogue-digital conversion; application specific integrated circuits; delay lines; emitter-coupled logic; logic arrays; CMOS ASICs; ECL; analog interpolation techniques; circuit board area; power consumption; short time interval measurements; tapped CMOS delay lines; time-to-digital conversion; time-to-digital converter; Application specific integrated circuits; CMOS logic circuits; Circuit testing; Delay lines; Energy consumption; Integrated circuit measurements; Interpolation; Logic design; Printed circuits; Time measurement;
Conference_Titel :
ASIC Seminar and Exhibit, 1989. Proceedings., Second Annual IEEE
Conference_Location :
Rochester, NY
DOI :
10.1109/ASIC.1989.123198
