Compiler-directed management of instruction accesses

Author

Chen, Gang ; Chen, G. ; Kayadif, I. ; Zhang, W. ; Kandemir, M. ; Kolcu, I. ; Sezer, U.

Author_Institution

Dept. of Comput. Sci. & Eng., Pennsylvania Univ., Philadelphia, PA, USA

fYear

2003

fDate

1-6 Sept. 2003

Firstpage

459

Lastpage

462

Abstract

We present a compiler-oriented strategy to reduce the memory system energy consumption due to instruction accesses and increase performance by exploiting scratch pad memories. Scratch pad memories (SPMs) are alternatives to conventional cache memories in embedded computing. These small on-chip memories, like caches, provide fast and low-power access to data and instructions; but, they differ from caches in that their contents are managed by software instead of hardware. Our compiler framework keeps the most frequently used instructions in SPM and dynamically changes the contents of the SPM as the (instruction) working set of the application changes.

Keywords

embedded systems; memory architecture; optimising compilers; power consumption; program compilers; cache memories; compiler-directed management; embedded computing; energy consumption; instruction accesses; memory system; on-chip memories; scratch pad memories; Cache memory; Computer aided instruction; Content management; Delay; Embedded computing; Energy consumption; Memory management; Power engineering and energy; Random access memory; Scanning probe microscopy;

fLanguage

English

Publisher

ieee

Conference_Titel

Digital System Design, 2003. Proceedings. Euromicro Symposium on

Conference_Location

Belek-Antalya, Turkey

Print_ISBN

0-7695-2003-0

Type

conf

DOI

10.1109/DSD.2003.1231984

Filename

1231984